RISC-V Summit 2018

Start date: December 3, 2018
End date: December 6, 2018
Time: 12:00 am - 12:00 am

SecureRF will be exhibiting at the first annual RISC-V Summit, which will be held December 3-6, 2018, at the Santa Clara Convention Center in Santa Clara, CA. RISC-V brings together a diverse group of software and hardware innovators and creates a collaborative community that drives the future of computer design and processor innovation.

Come to our booth to learn about our authentication and identification solutions for processor- to- processor security for RISC-V. Members of our technical team will also be on -hand to demonstrate the performance advantages of our Secure Boot and Secure Firmware Update solutions on the SiFive “HiFive” board.

Contact us to arrange to meet with the SecureRF team at the RISC-V Summit.